Provided by:
Indian Institute of Technology Kanpur
Topic:
Hardware
Format:
PDF
Multi-megabyte on-chip last-level caches are commonplace in high-end computing platforms. Even though these caches are often designed to have very high associativity, they suffer from non-uniform utilization of the sets leading to a high volume of conflict misses. Clustering of physical addresses to a few hot sets happens partly due to poor locality in the access stream and partly due to a mismatch in the access pattern and the virtual address to physical address translation algorithm.
