In this paper the authors propose an Ip core development of AMBA AHB on-chip bus tracer for versatile System-on-Chip (SoC) debugging and monitoring. The bus trace with different AHB signals, with efficient built-in compression mechanisms for diverse range of needs. It allows users to switch the trace signals dynamically so that appropriate signal levels can be applied to different segments of the trace. It mainly contains four parts: compression modules, event generation module, packing module and abstraction module. Event generation module controls the start/stop time, the trace mode, and the trace depth.