International Journal of Scientific and Research Publication (IJSRP)
Crosstalk in VLSI interconnects is a major constraint in DSM and UDSM technology. Among various strategies followed for its minimization, shield insertion between aggressor and victim lines is one of the most prominent options. Placing shields around a victim signal line is a common way to enhance signal integrity while minimizing delay uncertainty. This paper analyzes the extent of crosstalk in capacitive coupled interconnects and minimizes the same through shield insertion. Also, design guidelines for shielding in the presence of Power/Ground (P/G) noise are illustrated in this paper.