In this paper, FPGA implementation of 128-bit VLIW processor is proposed and it is used for data parallel applications and even precision is maintained. Full form of VLIW is Very Long Instruction Word. It is based on instruction level and data level parallelism. In which multi scalar and vector instructions are executed simultaneously. This paper is designed in Verilog. Their proposed processor is implemented using Xilinx FPGA vertex 5. The required numbers of slice registers and LUTs are 20292 and 24214 out of 28800 respectively.