Soft-cores are now-a-days becoming a vital part of an ASIC designer. These soft-cores when combined with FPGA's can prove to be very advantageous. FPGA's can be customized according to need of the designer and a lot of resource can be saved for other use on the FPGA. Hence a technique is built wherein the FPGA can be loaded at run time. The system basically has three vital components. One is the soft-core UART, the other is the soft-core processor, and the third is the software which does the user FPGA interaction. Software converts the assembly language to machine code and sends it to the FPGA.