Data Concentration and Archival to SD Card in Verilog Language

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Provided by: Creative Commons
Topic: Hardware
Format: PDF
Smart Grid (SG) is the next generation's power grid system. Delivering control, monitoring and management data to grid elements often requires the efficient archival of acquired information. The main objective of this paper is to design an experimental platform for efficient, on-chip, real-time data concentrator for accessing data from a secure digital flash memory card using the SD bus protocol. All the hardware design is done using Verilog hardware descriptive language and implemented in Field Programmable Gate Array (FPGA). The design has four independent modules for the required different operations on the SD memory card.
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