Provided by: National Science Foundation
Date Added: Mar 2015
In order to build energy efficient digital CMOS (Complementary Metal-Oxide-Semiconductor) circuits, the supply voltage must be reduced to near the device threshold voltage (NTV). Problematically, due to random parameter variation, supply scaling reduces circuit robustness. Moreover, the effects of parameter variation worsen as device dimensions diminish, further reducing robustness. Furthermore, dimensional scaling also increases the probability that high energy particle strikes (i.e., radiation) cause functional failures. As devices shrink, it is increasingly difficult to build energy efficient reliable systems and QDI logic is an excellent approach to tackling this problem because of its almost complete independence of delay.