Delay & Area Efficient Carry-Select Adder

Provided by: International Organization of Research & Development (IORD)
Topic: Hardware
Format: PDF
In this paper, the logic operations occupied in conventional Carry SeLect Adder (CSLA) and BEC-based Carry SeLect Adder (CSLA) i.e., binary to excess-1 converter based carry select adder are estimated to study the data dependence and to identify redundant logic operations. The authors have removed all the redundant logic operations included in the conventional CSLA and proposed a new logic formation for CSLA. In the proposed idea, the Carry Select (CS) function is planned before the calculation of final-sum which is unlike from the conventional approach.

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