Delay Study of Spartan-3A Field Programmable Gate Array

Provided by: IDOSI
Topic: Hardware
Format: PDF
In this paper, the authors are to evaluate Spartan-3A family devices and determine the significance and the extent of delay among the devices for Braun's multipliers. Braun's multipliers hardware implementation on Spartan-3A Field Programmable Gate Array (FPGA) devices including: XC3S50A, XC3S200A, XC3S400A, XC3S700A and XC3S1400A using very high speed integrated circuit Verilog Hardware Description Language (VHDL). The delay study is analyzed using ANalysis Of VAriance (ANOVA) method applying the software Statistical Package for Social Science (SPSS) with a 0.05 confidence level. Delay results comparison test show that the differences between the FPGA Spartan-3A devices are insignificant.

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