University of Vigo
Spin-Transfer Torque RAM (STT-RAM) has emerged as a potential candidate for Universal memory. However, there are two challenges to using STT-RAM in memory system design: the intrinsic variation in the storage element, the Magnetic Tunnel Junction (MTJ), and the high write energy. In this paper, the authors present a physically based thermal noise model for simulating the statistical variations of MTJs. They have implemented it in HSPICE and validated it against analytical results. They demonstrate its use in setting the write pulse width for a given write error rate. They then propose two write-energy reduction techniques. At the device level, they propose the use of a low-MS ferromagnetic material that can reduce the write energy without sacrificing retention time.