Design and Analysis of 2:1 Multiplexer for High Performance Digital Systems
Advances in CMOS technology have led to a renewed interest in the design of basic functional units for digital systems. The use of integrated circuits in high performance computing, telecommunications, and consumer electronics has been growing at a very fast pace. This paper is based on pre layout simulations of a proposed design of 2:1 multiplexer circuit that shows improved performance than the existing 2:1 multiplexer circuit. The proposed design demonstrates the superiority in terms of power-delay product, temperature sustainability and frequency when compared with existing 2:1 multiplexer and comparative analysis on 90nm and 45nm standard model on Tanner EDA tool version 13.0.