Provided by: Creative Commons
Date Added: Feb 2015
A low power 8-bit Transmission logic ripple carry adder cell based on sub-threshold logic is designed in this paper. Three different sub-threshold low power 8bit adders namely TFA, transmission gate adder and the conventional CMOS adder is designed using different techniques. To compare these adders all simulation is performed using 32nm technology in T-SPICE at voltage varies from the 0.25mv to 0.35mv and the frequency at 10MHZ and 20MHZ. Three different performance parameter like average power consumption, delay of sum and delay of carry and power delay product are calculated and compare with the conventional CMOS.