Design and Comparision of RS Encoder and RS Decoder on Family of Cyclone FPGA Using VHDL

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Provided by: Creative Commons
Topic: Hardware
Format: PDF
In a communication transmission system, data is transferred from a transmitter to a receiver across a physical medium of transmission or wireless channel. In this paper, design of Reed-Solomon (RS) encoder and decoder and perform this Codec on family of Cyclone FPGA and compare the performance based on area occupied by the design and the speed at which the design can run and power dissipation. The author applied forward error correction system to improve the overall performance of the system. The implementation is written in VHDL based on Barlekamp Massy, Forney and Chien search algorithm.
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