Design and Implementation of Arbitrary Modulo-Set RNS Forward Converters on FPGA

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Provided by: International journal of Engineering and Management Research (IJEMR)
Topic: Hardware
Format: PDF
In this paper, the authors analyzed four different architectures, which use combinational logic along with memory. The first architecture is purely sequential conversion. Second architecture is combination of sequential and parallel. The third architecture is the modified version of second architecture and final architecture is purely parallel. Architecture -3 utilizes 50% less resources when compared to architecture 1 & 2. Architecture -3 is 3 times faster than Architecture 1. This paper has designed and implemented forward converter architectures and performs the area, speed.
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