Design and Implementation of Booth Multiplier using Approximate Adders

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Provided by: International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering (IJIREEICE)
Topic: Hardware
Format: PDF
Low power is an imperative requirement for portable multimedia devices employing various signal processing algorithms and architectures. In most multimedia applications, human beings can gather useful information from slightly erroneous outputs. Therefore, the authors do not need to produce exactly correct numerical outputs. Previous research in this paper exploits error resiliency primarily through voltage overscaling, utilizing algorithmic and architectural techniques to mitigate the resulting errors. In this paper, they propose logic complexity reduction at the transistor level as an alternative approach to take advantage of the relaxation of numerical accuracy.
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