Design and Implementation of Logic Gates Using Finfet Technology

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Provided by: International Journal of Advanced Technology in Engineering and Science (IJATES)
Topic: Hardware
Format: PDF
Scaling as one of the most important challenges from the technology viewpoint. The channel length of Field Effect Transistors (FETs) has passed from micrometers to tens of nano meters. However, drawbacks of scaling have the increase of short channel, parasitic, reliability and variability effects. To overcome the problems related to scaling, new transistor architectures have to be investigated. FinFET is the most promising double-gate transistor architecture to extend scaling over planar device. Multiple gates have better control over the SCEs. Particularly the FinFET technology provides superior scalability of the DG-MOSFETs compared to the planar MOSFET.
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