Design and Implementation of Low power Carry Select Adder Using Transmission Gate Logic
Now-a-days, power reduction techniques play important role in low power VLSI applications. Adder is digital circuit it performing addition operation used in many application like microprocessor and DSP. In this paper, low power XOR gate has been designed using transmission gate logic, it is implemented carry select adder for low power VLSI application and compared with CMOS technology. The simulation is performed using a SPICE circuit simulator at 180nm technology node & 1.8V standard CMOS process.