Design and Implementation of Soft Core Processor on FPGA Based on Avalon Bus and SOPC Technology

Nios II is a soft Processor that can be incorporated in system implemented on a FPGA device by using Avalon Interface & SOPC technology. It allows easy interfacing of new peripheral blocks to existing software. The FPGA has the capability of parallel processing and hardware modification. It offers the possibility of microprocessor implementations, which can be programmed in assembly or C. The NIOS II is a versatile embedded processor family that presents high performance and has been created for FPGA.

Provided by: International Journal of Computer Applications Topic: Data Centers Date Added: Feb 2013 Format: PDF

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