Design and Performance Analysis of Low Power CMOS Op-Amp
In this paper, the authors propose a low power CMOS operational amplifier which operates at 1.8V power supply. The unique behavior of the MOS transistors in sub-threshold region not only allows a designer to work at low input bias current but also at low voltage. While operating the device at weak inversion results low power dissipation but dynamic range is degraded. Designing of two-stage op-amp is a multi-dimensional optimization problem where optimization of one or more parameters may easily result into degradation of others.