Design and Simulation of Sub Threshold Flip- Flops for Low Power VLSI Circuits
Power consumption minimization is constantly required to meet increasing demand for energy performance requirements. For this, designers of next-generation systems are trying hard to explore new approaches for least possible power consumption. Major factor to reduce the power consumption is Scaling of power supply voltage. To achieve higher drive current and hence better speed, threshold voltage may be reduced but at the cost of increase in the stand-by power. Operating the circuit with a supply voltage lower than the threshold voltage i.e. sub threshold region is the technique to achieve ultra-low power.