Design of a High Slew Rate Moderate Speed CMOS OPAmp
VLSI technology continues to scale to ever smaller transistor sizes to include more transistors in DRAM and increase microprocessor speed. In this paper, a high slew rate CMOS Operational Amplifier (Op-Amp) having moderate speed is presented which operates at supply voltage of 1.8 V (rail to rail) using TSMC 0.18 um CMOS technology. Current buffer compensation strategy in conjunction with Miller compensation is used to achieve high speed and high slew rate. In this design, a tradeoff between speed and power dissipation is maintained.