Interscience Open Access Journals
In this paper, the authors present a new double pulse flip-flop, which is composed of a pulse generator and latch part. DPLFF consumes less power and few transistor compare to other flip-flop. As feature size of the CMOS technology continues to scale down, leakage power has become an ever-increasing important part of the total power consumption of a chip. Double pulsed latch flip-flop faster than other flip-flop. This design features consumes less power. In this flip-flop, the authors modified the pulse generator to suit the circuit.