Design of a System-Level Pipelined JPEG Coder for a Homogeneous Multiprocessor Platform Using Replication

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Provided by: University of York Students' Union
Topic: Hardware
Format: PDF
In this paper, the authors present a case study on using replication for breaking system-level pipeline bottlenecks in Multi-Processor Systems-on-Chip (MPSoC). Using this approach, they have designed a JPEG coder application on a homogenous multiprocessor platform and have achieved 4.78
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