Design of a Variable point FFT processor for 4G Standards

In this paper, the authors propose a design of a variable point FFT processor using FPGA in which OFDMA Technology is applied. The FFT processor use Verilog HDL language to describe the circuit, use Quartus II 7.2 software to build the model, and use ModelSim SE 6.2b software to verify the timing function. Therefore, this design can be applied to real-time signal processing system, completes the main computing modules in the OFDMA system. The performance of the system is analyzed using MATLAB software and the result shows that The SINR of wireless OFDMA in the presence of CFO (Carrier Frequency Offset) and frequency selective fading becomes a ratio of correlated random variables, and recent research results have not provided exact expressions for its average.

Provided by: International Journal of Advanced Research in Computer and Communication Engineering (IJARCCE) Topic: Hardware Date Added: Mar 2014 Format: PDF

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