Adder logic cell is basically an important part of adder sub-system and is well known by the designers so many researchers are still working in this field for speeding up the circuit process along with power consumption. These cells are used in various application as DSP, microprocessors etc. In today’s modern world Complementary Metal Oxide Semiconductor (CMOS) design techniques are used for designing so that power, area and delay may be reduced. In this paper, designing of adder logic cell is done with the help of XOR/XNOR gate using microwind software. Here 120nm and 70nm technology is used.