Design of an Application-specific Instruction Set Processor for High-throughput and Scalable FFT

Provided by: edaa
Topic: Hardware
Format: PDF
Various Orthogonal Frequency Division Multiplexing (OFDM)-based wireless communication standards have raised more stringent requirements on throughput and flexibility of Fast Fourier Transformation (FFT), a kernel data transformation task in communication systems. Application-Specific Instruction set Processor (ASIP) has emerged as a promising solution to meet these requirements. In this paper, the authors propose a novel ASIP design tailored for FFT computation. They reconstruct the FFT computation flow into a scalable array structure based on an 8-point Butterfly Unit (BU).

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