Design of Area and Power Efficient Half Adder Using Transmission Gate
In this paper, the authors give an idea to reduce power and surface area of half adder circuit using very popular technique i.e. transmission gate. An adder is a digital circuit that performs addition of two numbers. In many computers and other kind of processors, adders are used not only in arithmetic logic unit but also in other parts of the processors where they are used to calculate addresses, table indices and similar operations. In this paper, two bit addition has been done using conventional and transmission gate level and power, area and number of transistors is the scope of comparison.