Design of Area Optimized, Low Power, High Speed Multiplier Using Optimized PDP Full Adder

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Provided by: International Research Publication House (IRPH)
Topic: Hardware
Format: PDF
Fast multipliers are essential parts of digital signal processing systems. The speed of multiply operation is of great importance in digital signal processing as well as in the general purpose processors. Now-a-days, there are an increasing number of portable applications requiring small-area, low power and high throughput circuitry. The circuits with low power consumption become the major issues for the design of microprocessor and system components. The adders and multipliers are the basic elements to construct the ASIC applications.
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