High performance arithmetic coder architecture is proposed in this paper for image compression. This arithmetic coder architecture is used in set partitioning. In hierarchical trees for further compression of the discrete wavelet transform decomposed images. The architecture is based on a simple context model. Simple context model results in regular access pattern during reading the wavelet transform coefficients which is convenient to the hardware implementation. The arithmetic coder contains four core's to process different contexts and there is an out-of-order execution mechanism for different types of context is proposed that helps to allocate the context symbol to the idle arithmetic coding core with different order that of input.