Design of Dual Edge Triggered Sense Amplifier Flip-Flop for Low Power Application

Dual edge triggered sense amplifier flip-flop for low power application is presented in this paper. This system is implemented using advanced Electronic Design Automation (EDA) tools. Now-a-days, as complexity means transistor on-chip increases the power requirement also get increases, so the power is an important in VLSI design. In VLSI circuit, the major design issues are power consumption and speed. Power dissipation can be reducing by a compromise of variety of components. Power consumption is also data dependent in VLSI circuit (like in multipliers).

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