Design of High Speed CODEC for On Chip Cross Talk Avoidance

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Provided by: International Journal of Innovative Technology and Exploring Engineering (IJITEE)
Topic: Hardware
Format: PDF
The cross talk is dependent on the data transition patterns on the bus, patterns can be classified based on the severity of the crosstalk they impose on the bus. The general idea behind techniques that improve on-chip bus speed is to remove undesirable patterns that are associated with certain classes of crosstalk. Different schemes incur different area overheads since they require additional wires, spacing between wires or both. The authors analyze the properties of the FPF-CAC and show that mathematically, a mapping scheme exists between the data words and code words.
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