Design of High-Speed Parallel Data Interface Based on ARM & FPGA
In this paper, the authors described a complete design of parallel interface based on ARM & FPGA, using the on-chip DPRAM in FPGA to improve the metastability problem which was generated during data transmission between the asynchronous clock-domains; and it achieved the design of ARM & FPGA hardware interface module, data-sending module, data-receiving module and FPGA driver module, also gave the feasible method that using a flag to solve the dislocation of data-reading; test results indicate that the system works steadily.
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