Design of Low Power Parallel FIR Digital Filter Using Floating - Point Multiplier

Provided by: International Journal of Emerging Technology and Advanced Engineering (IJETAE)
Topic: Hardware
Format: PDF
The Finite Impulse Response (FIR) filter is used as a fundamental processing element in any Digital signal processing (DSP) system. This paper describes the technique of algorithmic strength reduction which leads to a reduction in hardware complexity by exploiting substructure sharing (by reducing the number of multiplications and additions). This transformation is basically implemented for the reduction in silicon area or power consumption of Very Large Scale Integration (VLSI) design or iteration period in a programmable DSP implementation.

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