Institute of Advanced Engineering and Science (IAES)
The Network-on-Chip (NoC) is a communication centric interconnection approach which provides a scalable infrastructure to interconnect different IPs and sub-systems in a SoC. Network-on-Chip (NoC) is a general purpose on-chip communication concept that offers high throughput, which is the basic requirement to deal with complexity of modern systems. In network on chip topology design is one of the significant factors that affect the net delay of the system. In this paper mesh topology and torus topology are compared in terms of network delay for a given NOC application using Xillinc 9.1c.