Design of Pulse Detectors and Unsigned Sequential Multiplier Using Reversible Logic

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Provided by: International Journal of Computer Applications
Topic: Hardware
Format: PDF
International Technology Roadmap for Semi-conductor (ITRS) set a road map for More-than Moore (MtM). Where device is scaled more than what the Moore's law predicts. This MtM scaling will leads to substantially large design in the future and also huge power dissipation due to irreversible logic computation. Since, applying low power technique has become tedious and time consuming. The solution is reversible logic computation. It plays an important role in power dissipation reduction. A novel design of reversible pulse detectors and sequential multiplier are proposed in this paper.
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