Design of Reliable Custom Topology for Application Specific Network-on-Chip

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Provided by: International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering (IJAREEIE)
Topic: Hardware
Format: PDF
In this paper, reliable custom topology for Application Specific Network-on-Chip (ASNoC) which consumes less area and power consumption with high data protection (error free) is proposed. The proposed design is achieved in two steps. First, a custom topology is designed for ASNoC. Second, to improve the reliability of the custom topology, three novel error correction mechanisms have been designed and incorporated in the custom topology. The proposed three error corrections code consumes less are and power consumption with high error correction capability compared to the existing error correction codes.
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