Design of Testable Ripple Carry Adder in Quantum Dot Cellular Automata
In this paper, the authors provide an outline of two test vectors testable sequential circuit based on conservative logic gate with the help of logic gate testability. In proposed work two test vectors (all 1's and all 0's) are used to test classical unidirectional stuck at faults of any sequential circuit. By using two test vectors i.e. 1's and 0's all reverse sequential circuits completely testable any stuck-at fault. They found that parity mismatch occurs between the input and the output due to the fault in the molecular QCA implementation otherwise input parity is same as output parity.