International Academy for Science & Technology Education and Research (IASTER)
Reduced Instruction Set Computer (RISC) is a type of microprocessor architecture that utilizes a small, highly-optimized set of instructions rather than a more specialized set of instructions often found in other types of architectures. The RISC processor contains major components as Arithmetic Logic Unit (ALU), rotator and barrel shifter and control unit. In arithmetic and logic operations barrel shifter is used to shift a desired number of bits in a desired direction. In this paper, a 32-bit variable width barrel shifter in Verilog code was presented using Xilinx 12.1i, cadence tool and 16-bit variable width barrel shifter schematic view was presented using Virtuoso in cadence tools.