Designing of Ripple Carry Adder Using Domino Logic
In this paper, new design a proposed logic design targeting at full-custom high speed applications. The constant delay characteristic of this logic style regardless of the logic expression makes it suitable in implementing complicated logic expression such as addition. This feature enables performance advantage over static and dynamic, CD logic styles in a single cycle, multi-stage circuit block. Several design considerations including appropriate timing window width adjustment to reduce power consumption and maintain sufficient noise margin to ensure robust operations are discussed and analyzed.