Development of Block-Cipher Library for Reconfigurable Computers

Provided by: George Mason University
Topic: Hardware
Format: PDF
Reconfigurable computing is gaining rising attention as an alternative to traditional processing for many applications. Data encryption and decryption is one of these applications, which can get tremendous speedup running on FPGAs instead of microprocessors. The authors have developed a block-cipher library that covers 15 most popular encryption algorithms, and generated 35 bitstreams running on the SGI's latest version of a reconfigurable computer, RASC RC-100. The end-to-end throughput of 1.136 GB/s have been demonstrated for almost all ciphers, and was limited only by the input/output interface, rather than the FPGA processing time. The library is written in Verilog-HDL, and can be easily ported to other reconfigurable computing platforms.

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