Dual Redundancy CAN-Bus Controller Based on FPGA

Provided by: International Journal of Scientific and Research Publication (IJSRP)
Topic: Hardware
Format: PDF
In the present trend, CAN buses are implemented using software with the host computer monitoring the CAN as slave. Cause of which leads to bad reliability and real time performance. According to CAN specification version 2.0 of BOSCH gmbh, by downloading the IP core to XILINX's Spartan 6 FPGA, hardware implementation of customized Dual redundancy CAN bus controller is put forward in this paper. It's verified that proposed design can meet the required real-time performance and reliability.

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