DWARV 2.0: A CoSy-based C-to-VHDL Hardware Compiler
In the last decade, a considerable amount of effort was spent on raising the implementation level of hardware systems by automatically extracting the parallelism from input applications and using tools to generate hardware/software codesign solutions. However, the tools developed thus far either focus on particular application domains or they impose severe restrictions on the input language. In this paper, the authors present the DWARV 2.0 compiler that accepts general C-code as input and generates synthesizable VHDL for unrestricted application domains. Dissimilar to previous hardware compilers, this implementation is based on CoSy compiler framework.