Dynamic Applications on Reconfigurable Systems: From UML Model Design to FPGas Implementation

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Provided by: edaa
Topic: Hardware
Format: PDF
In this paper, the authors propose a design methodology to explore Dynamic and Partial Reconfiguration (DPR) of modern FPGAs. They define a set of rules in order to model DPR by means of UML and design patterns. Their approach targets MPSoPC (Multi-Processor System on Programmable Chip) which allows: area optimization through partial reconfiguration without performance penalty and increased system flexibility through dynamic behavior modeling and implementation. In their case, area reduction is achieved by reconfiguring co-processors connected to embedded processors, and flexibility is achieved by permitting new behavior to be easily added to the system.
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