Dynamic Scaling of Pipeline Depth

Provided by: International Journal of Computer and Information Technology (IJCIT)
Topic: Hardware
Format: PDF
The authors are developing a multi-core processor with a core unit that can control multiple execution units capable of scaling power and performance by scaling pipeline depth. In this paper, they validated the possibility of scaling the power and performance by scaling the pipeline depth. They used Synopsys' SAED-EDK90 libraries and conducted experiments using 100,000 test vectors to assess the proposed Floating-Point Fused Multiply-Add (FPFMA) unit. The results of synthesis and power simulation showed that area and leakage power increased by approximately 20% and 10%, respectively.

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