Dynamic Thermal Management via Architectural Adaptation
Exponentially rising cooling/packaging costs due to high power density call for architectural and software-level thermal management. Dynamic Thermal Management (DTM) techniques continuously monitor the on-chip processor temperature. Appropriate mechanisms (e.g., Dynamic Voltage or Frequency Scaling (DVFS), clock gating, fetch gating, etc.) are engaged to lower the temperature if it exceeds a threshold. However, all these mechanisms incur significant performance penalty. The authors argue that runtime adaptation of micro-architectural parameters, such as instruction window size and issue width, is a more effective mechanism for DTM.