University of Rome
During the last years, Network-on-Chips (NoCs) have become a true alternative for the design of complex integrated System-on-Chips (SoCs). Although NoCs are widely used in ASIC design for complex and multiprocessor SoCs, The authors mainly address NoCs on FPGAs where aspects like increasing design complexity, parasitics, and end-to-end latency have to be considered similarly. However, since NoCs are not yet matured in current design flows, EDA tools, and industrial applications, a lot of research is still necessary. Thus, one hot research area is the simulation and evaluation of NoCs in general and with regard to feasibility for a given application scenario.