Efficiency of Cache Mechanism for Network Processors

Provided by: Tsihai
Topic: Hardware
Format: PDF
With the explosion of network bandwidth and the ever-changing requirements for diverse network-based applications, the traditional processing architectures, i.e., General Purpose Processor (GPP) and Application Specific Integrated Circuits (ASIC) cannot provide sufficient flexibility and high performance at the same time. Thus, the Network Processor (NP) has emerged as an alternative to meet these dual demands for today's network processing. The NP combines embedded multi-threaded cores with a rich memory hierarchy that can adapt to different networking circumstances when customized by the application developers.

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