Efficient Approximately-Timed Performance Modeling for Architectural Exploration of MPSoCs

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Provided by: University of Engineering and Technology, Taxila
Topic: Hardware
Format: PDF
In this paper, the authors propose an efficient modeling approach that permits simulation-based performance evaluation of MPSoC at Electronic System Level (ESL). The approach is based on a SystemC simulation framework and allows for evaluating timing effects from resource contention when mapping applications to MPSoC platforms. The abstraction level used for modeling timing corresponds to approximately timed transaction level models. This paper allows for an accurate performance modeling, including temporal effects from preemptive processor scheduling and bus arbitration.
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