Efficient Decoding Using Majority Gate

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Provided by: International Journal of Engineering Research and Development (IJERD)
Topic: Hardware
Format: PDF
Normally, decoding is done to correct errors present in the code word by calculating syndrome. Syndrome calculation for large size code word makes decoding more complex. This paper presents an error detection and correction schemes using Majority Logic Decoding (MLD) which provides simple decoding process to detect and correct errors, the existing MLD requires number of clock cycles equal to size of code word to detect error but the proposed decoding significantly reduces the iterations by detecting error within three clock cycles for any size of code word using control logic.
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