Efficient Implementation of Pipelined Double Precision Floating Point Unit on FPGA

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Provided by: International Journal of Emerging Trends in Electrical and Electronics (IJETEE)
Topic: Hardware
Format: PDF
The arithmetic circuits are the most fundamental blocks which are used to build DSP hardware. Traditionally, Digital Signal Processing (DSP) is performed using fixed-point or integer arithmetic. Use of floating-point arithmetic provides a large dynamic range. Floating-point representation is able to retain its resolution and accuracy compared to fixed-point representations. Unfortunately, floating point operators require excessive area (or time) for conventional implementations. Here, the authors introduce a pipeline floating point Arithmetic Logic Unit (ALU). Pipeline is used to give high performance and throughput to arithmetic operation.
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